This table is pointed to by the vector for INT 1dH (0:0074).

It is used by INT 10H 00H when a video mode-change takes place.  The
values in this table describe the register values that must be stored into
the 6845 CRT controller, along with other data (such as the number of
columns, etc.) for the video variables stored in the BIOS Data Area
starting at 0:0449.

You may reset the INT 1dH vector to point it to your own TSR tables.  Then
the next mode change will use the values in your tables.

VidInitRec
Offset Size Contents
                                                                         
+0     16  abRegs40x25  6845 reg values for 40x25 modes (see below)
+10H    16  abRegs80x25  6845 reg values for 80x25 modes
+20H    16  abRegsGfx    6845 reg values for graphics modes
+30H    16  abRegsMono   6845 reg values for 80x25 Monochrome
+40H     2  wSize40x25   40x25 modes: regen RAM for one screen page
+42H     2  wSize80x25   80x25 modes: regen RAM for one screen page
+44H     2  wSizeLoRes   low-res graphics modes: regen RAM size
+46H     2  wSizeHiRes   hi-res graphics modes: regen RAM size
+48H     8  abClmCnts    column count for each of 8 modes
+50H     8  abModeCodes  values for the mode-set register (port 3d8H) for
each mode.  Current setting is at 0040:0065.
88               size of a VidParmRec

The first 40H bytes of the table consists of four 16-byte tables that
each contain a set of 1-byte register values for each of the 6845
CRT-controller registers in their sequential order (R0...R15):

R0:  horizontal total     -- horizontal sync in character clocks
R1:  horizontal displayed -- characters per line
R2:  horizontal sync pos. -- use to move display left or right
R3:  sync width           -- vert. and horiz. pulse (4 bits each)
R4:  vertical total       -- total vertical lines of characters
R5:  vertical adjust      -- adjusts for 50 or 60 Hz refresh
R6:  vertical displayed   -- lines of characters displayed
R7:  vertical sync pos    -- lines shifted up or down
R8:  interlace/skew       -- (bits 4 and 5) interlace mode
(bits 6 and 7) skew mode
R9:  max scan line addr.  -- scan lines per character row
R10:  cursor start         -- starting scan line of cursor
R11:  cursor stop          -- ending scan line of cursor
R12:  video RAM start addr -- start of displayed page (high byte)
R13:                                                  (low byte)
R14:  cursor pos           -- offset address in vid mem (high byte)
R15:                                                    (low byte)

6845 Registers 16-17 are not stored in the table.  But they are:

R16:  light pen address (high byte)
R17:                    (low byte)

See Also: CGA  MDA
- -

Video Initialization Table