This table lists all 80x86 opcodes except 80x87 Floating Point Opcodes.
Additional descriptions are available in the the Opcode Functional Groups.

AAA               adjust after ASCII addition
AAD               adjust before ASCII division
AAM               adjust after ASCII multiply
AAS               adjust for ASCII subtraction
ADC  dest,src     add two operands, using carry from previous ADD
ADD  dest,src     add two operands, placing result in dest
ADDRSIZ           (prefix; 67H) next address ref is non-default size   386+
AND  dest,src     logical AND (mask; reset dest bits which are 0 in src)
ARPL lvl          Adjust Requested Priv. Level to higher of cur or lvl 286+
BOUND reg16,lmts  perform limit-check on reg16
BSF reg,src       Bit Scan Forward; reg (index of next 1-bit of src)   386+
BSF reg,src       Bit Scan Reverse; reg (index of prev 1-bit of src)   386+
BSWAP reg32       Swap low-to-high order of reg32 to high-to-low       486+
BT r/m,im8/reg    Test bit; put bit im8 (or reg) of reg/mem into CF    386+
BTC r/m,im8/reg   Test bit im8 (or reg) of r/m & complement that bit   386+
BTR r/m,im8/reg   Test bit im8 (or reg) of reg/mem and reset that bit  386+
BTS r/m,im8/reg   Test bit im8 (or reg) of reg/mem and set that bit    386+
CBW               convert byte to word (sign-extend AL into AH)
CLC               clear the carry flag to NC                        (CF 0)
CLD               clear direction flag to UP (DF UP 0) set to auto-increment
CLI               disable maskable hardware interrupts              (IF 0)
CMC               complement (reverse the value of) the carry flag  (CF ~CF)
CMP  dest,src     compare (non-destructive subtract)
CMPSB             compare byte strings; flags (rslt of CMP DS:[SI],ES:[DI]);
DI+=1; SI+=1
CMPSW             like CMPSB but for words (opSize is 2 or 4 bytes)
CMPXCHG r/m,reg   Compare and Exchange                                 486+
CMPXCHG8B         Compare and Exchange 8 bytes                      Pentium
CPUID             Get info into EBX,ECX,EBX (mode is 0 or 1 in EAX) Pentium
CTS/CLTS          clear task switch flag                        (TF 1) 286+
CWD               convert word to dword (sign-extend AX into DX)
DAA               adjust after BCD  addition
DAS               adjust for BCD  subtraction
DEC  dest         subtract 1 from dest (reg or r/m)
DIV  src          divide accumulator by unsigned value src (reg/mem)
ENTER frmsiz,cnt  set high-level language stack frame
FWAIT             wait for TEST line active (synchronize with coprocessor)
HLT               halt processing (perform NOPs until an interrupt occurs)
IDIV src          divide accumulator by unsigned value src (reg/mem)
IMUL r16,r/m,im16 multiply reg/mem by 16-bit immediate signed value    286+
IMUL src          multiply AL(AX) by signed integer src (reg/mem)
IN   AL/AX,DX     input to AL(or AX) from I/O port DX
IN   AL/AX,port8  input to AL(or AX) from I/O port
INC  dest         add 1 to dest (reg or r/m)
INSB              port input byte into string;  byte at port DX) DI+=1 286+
INSW              like INSB but fetches 16-bit words; DI+=2            286+
INT  type         perform a software interrupt (call a system function)
INTO type         if OF==OV==1, then perform INT type
INVD              Invalidate Data Cache                                486+
INVLPG mem        Invalidate Translation Lookaside Buffer (TLB) entry  486+
IRET              return from interrupt
JA   shortLbl     jump if Above ((CF & ZF)==0 after unsigned math)
JAE  shortLbl     jump if Above or Equal (CF==NC==0 after unsigned math)
JB   shortLbl     jump if Below/Jump if Carry set (CF==CY==1)
JC   shortLbl     jump if Below/Jump if Carry set (CF==CY==1)
JCXZ shortLbl     jump if CX==0
JE   shortLbl     jump if Equal (ZF==ZR==1)
JECXZ target      Jump to target if ECX is 0                           386+
JG   shortLbl     jump if Greater (SF==(OF & ZF) after signed math)
JGE  shortLbl     jump if Greater or Equal (SF==OF after signed math)
JL   shortLbl     jump if Less (ZF != OF after signed math)
JLE  shortLbl     jump if Less or Equal (SF!=OF || ZF==0 after signed math)
JMP  target       unconditionally transfer control to target
JNB  shortLbl     jump if Above or Equal (CF==NC==0 after unsigned math)
JNBE shortLbl     jump if Above ((CF & ZF)==0 after unsigned math)
JNC  shortLbl     jump if carry not set (CF==NC==0) (same as JAE/JNB)
JNE  shortLbl     jump if Not Equal (ZF==NZ==0)
JNG  shortLbl     jump if Less or Equal (SF!=OF || ZF==0 after signed math)
JNGE shortLbl     jump if Greater (SF==(OF & ZF) after signed math)
JNGE shortLbl     jump if Less (ZF != OF after signed math)
JNL  shortLbl     jump if Greater or Equal (SF==OF after signed math)
JNO  shortLbl     jump if Not Overflow (OF==NO==0)
JNP  shortLbl     jump if Parity Odd (PF==PO==0: cnt of 1-bits is ODD)
JNS  shortLbl     jump if Not Sign (SF==PL==0: same as high-bit of dest)
JNZ  shortLbl     jump if Not Equal (ZF==NZ==0)
JO   shortLbl     jump if Overflow (OF==OV==1)
JP   shortLbl     jump if Parity Even (PF==PE==1 cnt of 1-bits is even)
JPE  shortLbl     jump if Parity Even (PF==PE==1 cnt of 1-bits is even)
JPO  shortLbl     jump if Parity Odd (PF==PO==0: cnt of 1-bits is ODD)
JS   shortLbl     jump if Sign (SF==NG==1: same as high-bit of dest)
JZ   shortLbl     jump if Equal (ZF==ZR==1)
LAHF              load/convert flags into AH
LAR  dest,src     load high-byte of dest with Access Rights of src dsc 286+
LDS  r16,mem      load DS and reg16 from memory variable
LEA  r16,addr     load address into a register
LEAVE             undo the effect of ENTER.  Use just before RET.
LES  r16,mem      load ES and reg16 from memory variable
LFS reg,mem       Load FS and reg from memory                          386+
LGDT src          load Global Descr. Table from 6-byte table at src    286+
LGS reg,mem       Load GS and reg from memory                          386+
LIDT src          load Int. Descriptor Table from 6-byte table at src  286+
LLDT src          load Local Descr. Tbl (GDT selector) from reg/mem16  286+
LMSW src          load Machine Status Word (use to enter prot. mode)   286+
LOCK              (prefix) prevent coproc. bus access on next opcode   386+
LODSB             copy string byte into AL; AL   DS:[SI]; SI+=1
LODSW             copy string word into (E)AX; (E)AX DS:[SI]; SI+=(2 or 4)
LOOP shortLbl     CX (CX-1) jump if CX!=0
LOOPE  shortLbl   CX (CX-1) jump if CX!=0 && ZF==ZR==1
LOOPNE shortLbl   CX (CX-1) jump if CX!=0 && ZF==NZ==0
LOOPNZ shortLbl   CX (CX-1) jump if CX!=0 && ZF==NZ==0
LOOPZ  shortLbl   CX (CX-1) jump if CX!=0 && ZF==ZR==1
LSL  dest,src     load dest with Segment Limit of descr. named by src  286+
LSS  reg,mem      Load SS and reg from memory                          386+
LTR  src          load Task Register (GDT selector) from reg/mem16     286+
MOV  dest,src     transfer (copy) data to/from register, to/from memory
MOV  CRn,src32    Load src32 data into Control Register n (0,2,or 3)   386+
MOV  dest,CRn     Load Control Register n into dest (reg/mem32)        386+
MOV  dest,DRn     Load Debug Register n into dest (reg/mem32)          386+
MOV  dest,TRn     Load Test Register n into dest (reg/mem32)           386+
MOV  DRn,src32    Load src32 data into Debug Register n (0-3,6,or 7)   386+
MOV  TRn,src32    Load src32 data into Test Register n (3-7)           386+
MOVSB             copy byte string; ES:[DI] DS:[SI]; DI+=1; SI+=1
MOVSW             copy word string; ES:[DI] DS:[SI]; DI+= ; SI+=  ( =2 or 4)
MOVSXB            MOVSB with SF (sign) extension                       386+
MOVSXW            MOVSW with ZF (zero) extension                       386+
MUL  src          multiply AL(AX) by unsigned value src (reg/mem)
NEG  dest         change sign of an operand
NOT  dest         form 1's complement (toggle every bit in dest)
OR   dest,src     inclusive OR (set dest bits which are 1s in src)
OUT  DX,AL/AX     output from AL (or AX) to I/O port DX
OUT  port8,AL/AX  output from AL (or AX) to I/O port
OUTS              like OUTSB but outputs 16-bit words; SI+=2           286+
OUTSB             port output byte from string; [prtDX] DS:[SI]; SI+=1 286+
POP  dest         transfer from stack to dest (reg16, r/m16, or segreg)
POPA              POP All: copy general registers from stack.          286+
POPF              POP Flags: transfer from stack to flags register
PUSH immed        transfer immed16 (or sign-extended immed8) to stack.
PUSH src          transfer reg16 or r/m16 to stack
PUSHA             PUSH ALL: copy general registers to stack.           286+
PUSHF             PUSH Flags: transfer flags register to stack
RCL  dest[,cnt]   rotate dest left through Carry by 1, CL, or cnt
RCR  dest[,cnt]   rotate dest right through Carry by 1, CL, or cnt
RDMSR reg/mem     Read from model-specific register in ECX          Pentium
RDTSC             Read timestamp counter                            Pentium
REP/REPE/REPZ     (prefix) repeat: perform string operation repeatedly
CX (CX-1); string op repeats until CX==0
REPNE/REPNZ       (prefix) repeat: useful for string ops CMPS and SCAS
ZF 0; CX (CX-1); StrOp repeats while (CX!=0 and ZF==0)
ROL  dest[,cnt]   rotate dest left by 1, CL, or cnt
ROR  dest[,cnt]   rotate dest right by 1, CL, or cnt
SAHF              store/convert AH into flags
SAL  dest         shift left (multiply by 2) by 1, CL, or cnt
SAR  dest         shift arithmetic right (retain high bit) by 1, CL, or cnt
SBB  dest,src     subtract using borrow (carry flag) from previous SUB
SCASB             find byte in string; flags (rslt of CMP DS:[DI],AL); DI+=1
SCASW             like SCASB but for words (opSize is mem16 or mem32; DI+= )
SEG  segreg       (prefix) override default segreg for next EA calc
SETccc dest       If condition ccc is true, set the byte at dest to 1  386+
SGDT dest         store 6-byte Global Desc. Table to memory at dest    286+
SHL  dest[,cnt]   shift left (multiply by 2) by 1, CL, or cnt
SHLD r/m,reg,im8  shift left r/m (16- or 32-bit) by im8 (or CL) bits,
r/m,reg,CL    inserting data from reg into the vacated positions  386+
SHR  dest[,cnt]   shift right (divide by 2) by 1, CL, or cnt
SHRD r/m,reg,im8  shift right r/m (16- or 32-bit) by im8 (or CL) bits,
r/m,reg,CL     inserting data from reg into the vacated positions 386+
SIDT dest         store 6-byte Int. Descriptor Table to memory at dest 286+
SIZ               (prefix; 66H) next data ref is non-default size      386+
SLDT dest         store Local Descr. Table register into dest (r/m16)  286+
SMSW src          store Machine Status Word to reg/mem16               286+
STC               set the carry flag to CY                          (CF 1)
STD               set direction flag to DN (DF DN 1)  set to auto-decrement
STD               set direction flag to DN (string ops decrement)   (DF 1)
STI               enable maskable hardware interrupts               (IF 1)
STOSB             store byte into string; ES:[DI] AL; DI+=1
STOSW             store word into string; ES:[DI] (E)AX; DI+=  ( =2 or 4)
STR  dest         store Task Register to reg/mem16                     286+
SUB  dest,src     subtract src from dest, leaving result in dest
TEST dest,src     non-destructive AND (bit test; JZ jumps if no match)
VERR seg          Sets ZF to ZR if task has read privileges for seg    286+
VERW seg          Sets ZF to ZR if task has write privileges for seg   286+
WAIT              wait for TEST line active (synchronize with coprocessor)
WBINVD            Write-Back and Invalidate Data Cache                 486+
WRMSR reg/mem     Write to model-specific register in ECX           Pentium
XADD r/m,reg      Exchange and Add                                     486+
XCHG dest,src     exchange values of two registers or register and r/m
XLAT              translate AL into a value in a translation table at BX
XOR  dest,src     exclusive OR (toggle dest bits which are 1s in src)
                                                                            

Alphabetical List of Opcodes